SanDisk, Toshiba, Intel and Micron Locked in 3D Flash Memory Race

By Pedro Hernandez

SanDisk announced on Wednesday that it had developed its second-generation, 48-layer 3D NAND flash chips along with partner company Toshiba. The company is planning test production runs of the technology, dubbed BiCS2, during the second quarter of 2015 in the Yokkaichi Operations manufacturing facility in Japan, with an eye toward shipping enterprise solid-state drives (SSDs) and other storage products in 2016.

"We utilized our first generation 3D NAND technology as a learning vehicle, enabling us to develop our commercial second generation 3D NAND, which we believe will deliver compelling storage solutions for our customers," said Dr. Siva Sivaram, executive vice president of SanDisk's Memory Technology unit, in a statement.

Toshiba described its "world's first" 48-layer, stacked-cell BiCS chip as "a 2-bit-per-cell 128-gigabit (16 gigabytes) device," in a statement to the press. The technology offers improved write speeds and enhanced endurance, according to the company, which is also enlisting the 3D NAND for high-capacity SSDs. Sample shipments have begun and full production is expected to take place once the new Fab2 plant at Yokkaichi Operations is completed during the first half of 2016.

Meanwhile, Intel and Micron unveiled their own 3D NAND chip technology, which the companies say will lead to lower-cost, "gum stick-sized SSDs" that pack over 3.5 terabytes (TB) of storage capacity and 2.5-inch SSDs with over 10 TB of space for files and application data.

"This 3D NAND technology has the potential to create fundamental market shifts," remarked Brian Shirley, vice president of Memory Technology and Solutions at Micron. "The depth of the impact that flash has had to date – from smartphones to flash-optimized supercomputing – is really just scratching the surface of what's possible."

The chips are the first to use a floating gate cell design in a 3D NAND configuration. "The new 3D NAND technology stacks flash cells vertically in 32 layers to achieve 256Gb multilevel cell (MLC) and 384Gb triple-level cell (TLC) die that fit within a standard package," the companies said in a statement.

MLC samples are currently shipping to select partners and samples of the TLC version are expected to ship later this spring. Full production will kick off in the fourth quarter and both companies will ship their own SSDs based on the technology.

At up to 48 GB of NAND per die, Intel and Micron claim that the design breakthrough enables a significant increase in flash storage capacity – three times that current 3D NAND TLC chips. Buyers can also expect better performance, bigger energy savings and longer-lived SSDs, the companies assert.

Pedro Hernandez is a contributing editor at InfoStor. Follow him on Twitter @ecoINSITE.

Photo courtesy of Shutterstock.

This article was originally published on March 27, 2015